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 INTEGRATED CIRCUITS
74F676 16-bit serial/parallel-in, serial-out shift register (3-State)
Product specification IC15 Data Handbook 1989 Apr 18
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
FEATURES
* 16-bit parallel-to-serial conversion * 16-bit serial-in, serial-out * Chip select control * Power supply current 48mA typical * Shift frequency 110MHz tyical * Available in 300mil-wide 24-pin Slim DIP package
DESCRIPTION
The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0-D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low, data is shifted out of the most significant bit position while information present on the serial (SI) input shifts into the least significant bit position. A High signal on the chip select (CS) input prevents both parallel and serial operations. The 16 bit shift register operates in one of three modes, as indicated in the shift register Function Table. Hold: A High signal on the Chip Select (CS) input prevents clocking and data is stored in the 16 registers. Serial load: Data present on the SI pin shifts into the register on the falling edge of CP. Data enters the Q0 position and shifts toward Q15 on successive clocks finally appearing on the SO pin. Parallel load: Data present on D0-D15 is entered into the register on the falling edge of CP. The SO output represents the Q15 register output. To prevent false clocking, CP must be Low during a Low-to-High transition of CS.
PIN CONFIGURATION
CS CP NC SI M SO D0 D1 D2 1 2 3 4 5 6 7 8 9 24 VCC 23 D15 22 D14 21 D13 20 D12 19 D11 18 D10 17 D9 16 D8 15 D7 14 D6 13 D5
D3 10 D4 11 GND 12
SF01209
TYPE 74F676
TYPICAL fMAX 110MHz
TYPICAL SUPPLY CURRENT (TOTAL) 48mA
ORDERING INFORMATION
DESCRIPTION 24-Pin Plastic Slim DIP (300mil) 24-Pin Plastic SOL COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F676N N74F676D PKG DWG # SOT222-1 SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS D0-D15 SI CS CP M SO Parallel data inputs Serial data input Chip Select input (active Low) Clock Pulse input (active falling edge) Mode select input Serial data output DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 1mA/20mA
NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High state and 0.6mA in the Low state.
1990 Apr 18
2
853-0284 99394
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
LOGIC SYMBOL
4 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23
LOGIC DIAGRAM
CP CS M 2 1 5 4 7 D CP Q
SI D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 1 2 5 CS CP M SO D1 8 D CP Q SI D0
VCC = Pin 24 GND = Pin 12
CP 6
SF01210
D2
9
D
Q
LOGIC SYMBOL (IEEE/IEC)
D3 SRG16 5 0 M 1 1 2 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 4 2, 3D 1, 3D 6 D10 18 D D9 17 D D8 16 D D7 15 D D6 14 D & C3/1 0 2 D4 10 D
CP Q
CP 11 D Q
CP 2, 3D D5 13 D Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP
SF01211
D11
19
D
Q
CP
FUNCTION TABLE
CONTROL INPUTS CS H L H L X = = = = M X L CP X Hold Shift/Serial load OPERATING MODE
D12
20
D
Q
CP D13 21 D Q
L H Parallel load High voltage level Low voltage level Don't care High-to-Low transition of clock input
CP D14 22 D Q
CP D15 VCC = Pin 24 GND = Pin 12 23 D Q
6
SO
SF01212
1990 Apr 18
3
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5.0 -0.5 to +VCC 40 0 to +70 -65 to +150 UNIT V V mA V mA C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER LIMITS MIN 4.5 2.0 0.8 -18 -1 20 70 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG MIN VCC = MIN, VIL = MAX, , , VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX, , , VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX -60 48 10%VCC 5%VCC 10%VCC 5%VCC 2.5 2.7 3.4 0.30 0.30 -0.73 0.50 0.50 -1.2 100 20 -0.6 -150 72 TYP
NO TAG
UNIT MAX V V V V V A A mA mA mA
VO OH
High-level High level output voltage
VO OL VIK II IIH IIL IOS ICC
Low-level Low level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output currentNO TAG
Supply current (total)
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS should be performed last.
1990 Apr 18
4
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN fMAX tPLH tPHL Maximum clock frequency Propagation delay CP to SO Waveform NO TAG Waveform NO TAG 100 4.5 5.0 TYP 110 8.0 7.0 11.0 12.5 MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 90 4.5 5.0 12.0 13.5 MAX MHz ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS S O SYMBOL PARAMETER S CONDITION O TEST CO Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(L) th(H) tw(H) tw(L) Setup time, High or Low SI to CP Hold time, High or Low SI to CP Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP Setup time, High or Low M to CP Hold time, High or Low M to CP Setup time, Low CS to CP Hold time, High CS to CP CP Pulse width, High or Low Waveform 2 Waveform 2 Waveform 2 Waveform 2 Waveform 2 Waveform 2 Waveform 2 Waveform 2 Waveform NO TAG 4.0 4.0 4.0 4.0 3.0 3.0 4.0 4.0 8.0 8.0 2.0 2.0 10.0 10.0 4.0 6.0 TYP MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.0 4.0 4.0 4.0 3.0 3.0 4.0 4.0 8.0 8.0 2.0 2.0 10.0 10.0 4.0 6.0 MAX ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/fMAX CP Dn, CS, M, SI VM tw(L) tPLH SO VM VM tw(H) tPHL CP VM VM VM VM VM ts(H) VM th(H) VM ts(L) VM th(L)
SF01213
SF01214
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Setup and Hold Times
1990 Apr 18
5
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
TEST CIRCUIT AND WAVEFORM
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
1990 Apr 18
6
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1989 Apr 18
7
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1989 Apr 18
8
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
NOTES
1989 Apr 18
9
Philips Semiconductors
Product specification
16-bit serial/parallel-in, serial-out shift register (3-State)
74F676
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 397-750-05173
Philips Semiconductors
yyyy mmm dd 10


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